AS1130-BWLT datasheet(21/67 Pages) AMSOSRAM

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[v2-01] 2016-Oct-12

AS1130 − Detailed Description

Figure 28:

Reading N Bytes from AS1130

I²C Device Address Byte

The address byte (see Figure 29) is the first byte received

following the START condition from the master device.

Figure 29:

I²C Device Address Byte

The bit 1, 2 and 3 of the address byte are defined through the

resistor @ the device select pin ADDR (see Figure 30). A

maximum of 8 devices with the same pre-set code can be

connected on the same bus at one time.

• The last bit of the address byte (R/W) define the operation

to be performed. When set to a 1 a read operation is

selected; when set to a 0 a write operation is selected.

• I²C Common address. All devices are responding on the

address “0111111” if the function is enabled in the register

AS1130 Config Register (0x06).

Following the START condition, the AS1130 monitors the I²C

bus, checking the device type identifier being transmitted.

Upon receiving the address code, and the R/W bit, the slave

device outputs an acknowledge signal on the SDA line.

From Master to Slave

From Slave to Master

A/A

First Data Byte

Second Data Byte

Slave Address

Not Acknowledge

from Master

Acknowledge

from Master

Acknowledge

from AS1130

R/W

AS1130 Registers

Autoincrement

Memory Word

Address

n Bytes

Autoincrement

to next address

Stop reading

AD2

AD1

AD0

R/W

MSB

LSB

address:

*) can be factory set to 1

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