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DIO74557LP10 Datasheet(PDF) 6 Page - DIOO MICROCIRCUITS CO., LTD |
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DIO74557LP10 Datasheet(HTML) 6 Page - DIOO MICROCIRCUITS CO., LTD |
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6 / 12 page ![]() DIO74557 www.dioo.com © 2024 Dioo Microcircuits Co.,Ltd. Jiangsu DIO74557• Rev. 1.5 - 6 - RST_SIM 42 Ω CLK_SIM 42 Ω Cio[1] Input/Output capacitance IO_SIM 10 pF RST_SIM 10 pF CLK_SIM 10 pF Note: [1] Guaranteed by design. [2] Specifications subject to change without notice. Dynamic Characteristics 1.65 V ≤ VCCB ≤ 3.6 V; 1.08 V ≤ VCCA ≤ 1.95 V; fclk = fio = 1 MHz; TA = -40 °C to +85 °C; typical values are at 25°C, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit VCCA = 1.8 V; VCCB = 3.0 V; SIM card CL ≤ 30 pF; host CL ≤ 10 pF tPD Propagation delay (See Figure 2) I/O channel; SIM card side to host side 12 ns All channels; host side to SIM card side 10 ns tt Transition time (See Figure 2) I/O channel; SIM card side to host side 7 ns All channels; host side to SIM card side 4 ns tsk(o) Output skew time Between channels IO_SIM and CLK_SIM 2 ns fclk Clock frequency CLK_SIM 10 MHz VCCA = 1.2 V; VCCB = 1.8 V; SIM card CL ≤ 30 pF; host CL ≤ 10 pF tPD Propagation delay (See Figure 2) I/O channel; SIM card side to host side 16 ns All channels; host side to SIM card side 15 ns tt Transition time (See Figure 2) I/O channel; SIM card side to host side 7 ns All channels; host side to SIM card side 4 ns tsk(o) Output skew time Between channels IO_SIM and CLK_SIM 2 ns fCLK Clock frequency CLK_SIM 10 MHz Note: Specifications subject to change without notice. Figure 2. Data input to data output propagation delay times Note: VOL and VOH are typical output voltage levels that occur with the output load. tPHL and tPLH are tPD propagation delay; tTHL and tTLH are the transition time. |
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