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M74HCT74 Datasheet(PDF) 1 Page - STMicroelectronics |
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M74HCT74 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 10 page ![]() 1/10 August 2001 s HIGH SPEED : fMAX = 48MHz (TYP.) at VCC = 4.5V s LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C s COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 74 DESCRIPTION The M74HCT74 is an high speed CMOS DUAL D TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. A signal on the D INPUT (nD) is transferred on the Q OUTPUT during the positive going transition of the clock pulse. CLEAR (CLR) and PRESET (PR) are independent of the clock and accomplished by a low on the appropriate input. The M74HCT74 is designed to directly interface HSC2MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage. M74HCT74 DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP M74HCT74B1R SOP M74HCT74M1R M74HCT74RM13TR TSSOP M74HCT74TTR TSSOP DIP SOP |
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