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SA316-RX Datasheet(PDF) 11 Page - NiceRF Wireless Technology Co., Ltd.

Part # SA316-RX
Description  Small size, stamp-hole design for embedding
PDF  13 Pages
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Manufacturer  G-NICE [NiceRF Wireless Technology Co., Ltd.]
Direct Link  https://www.nicerf.com/
Logo G-NICE - NiceRF Wireless Technology Co., Ltd.

SA316-RX Datasheet(HTML) 11 Page - NiceRF Wireless Technology Co., Ltd.

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www.nicerf.com
SA316S
NiceRF Wireless Technology Co., Ltd.
Rev 1.8
- 11 -
sales@nicerf.com
9
MIC_P
I
Positive end of microphone input, (the best signal is
less than 300mVrms)
11
VCC
+3.3V
Power positive input (2.8V-3.6V, typical 3.3V)
13
TXD
O
0-3.3V
Serial data output
14
RXD
I
0-3.3V
Serial data input
15
SET
I
0-3.3V
Function temporarily reserved
16
CS
I
0-3.3V
Module sleep pin (low level work, high level sleep)
18
LED
O
0-3.3V
Output indication, high output when transmitting
signal, low output when not transmitting signal
19
GPIO4
I/0
0-3.3V
GPIO4 of the built-in audio chip
20
GPIO3
I/O
0-3.3V
The GPIO3 of the built-in audio chip can be
configured as SDIN when using I2S mode
Pin NO.
Pin name I/O Level standard
Description
1
TXD
O
0-3.3V
Serial Data Output
2
RXD
I
0-3.3V
Serial data input
3
SET
I
0-3.3V
Function temporarily reserved
4
CS
I
0-3.3V
Module sleep pin (low level work, high level sleep)
5
GPIO4
I/0
0-3.3V
GPIO4 of the built-in audio chip
6
GPIO3
I/O
0-3.3V
The GPIO3 of the built-in audio chip can be
configured as SDIN when using I2S mode
7
ANT
0
RF signal output, connect to 50 ohm antenna
8.9,10,12
GND
0V
Connect to the negative pole of the power supply
11
VCC
+3.3-5.0V
Power positive input (+3.3V-5.0V, typical 4.2V)
13
TXLED
O
0-3.3V
Output indication: High when transmitting, low
when not.
14
GPIO2
I/O
0-3.3V
Connect audio chip's GPIO2 to I2S mode as MCLK.
15
GPIO1
I/O
0-3.3V
Connect GPIO1 of audio chip to I2S mode as SCK.
16
MIC_N
I
Negative
end
of
microphone
input,
connect to GND
17
MIC_P
I
Positive end of microphone input, (the best signal is
less than 200mVrms)
18
GPIO0
I/O
0-3.3V
The GPIO0 of the built-in audio chip can be
configured as LRCK when using I2S mode



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