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RX72N Datasheet(PDF) 97 Page - Renesas Technology Corp

Part # RX72N
Description  Renesas MCUs
PDF  179 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RX72N Datasheet(HTML) 97 Page - Renesas Technology Corp

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R01DS0343EJ0120 Rev.1.20
Page 97 of 179
Nov 15, 2023
RX72N Group
2. Electrical Characteristics
Note 1. If the main clock oscillator is selected by the CLKOUT output source select bit (CKOCR.CKOSEL[2:0]) and the external clock
input is selected by the main clock oscillator switching bit (MOFCR.MOSEL), the pulse width depends on the input clock wave
form.
Figure 2.12
CLKOUT Pin Output Timing
Figure 2.13
CLKOUT25M Pin Output Timing
Table 2.21
CLKOUT Pin Output Timing
Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0,
VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V,
Ta = Topr,
High-drive output is selected by the drive capacity control register
Item
Symbol
Min.
Typ.
Max.
Unit
Test
Conditions
CLKOUT pin output cycle time
tCcyc
25
ns
Figure 2.12
tCcyc = 25 ns
CLKOUT pin output high pulse width*1
tCH
5—
ns
CLKOUT pin output low pulse width*1
tCL
5—
ns
CLKOUT pin output rising time
tCr
——
5
ns
CLKOUT pin output falling time
tCf
——
5
ns
Table 2.22
CLKOUT25M Pin Output Timing
Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0,
VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V,
Ta = Topr,
High-speed interface high-drive is selected by the drive capacity control register
Item
Symbol
Min.
Typ.
Max.
Unit
Test
Conditions
CLKOUT25M pin output cycle time
tCcyc
40
ns
Figure 2.13
CLKOUT25M pin output high pulse width
tCH
13
ns
CLKOUT25M pin output low pulse width
tCL
13
ns
CLKOUT25M pin output rising time
tCr
——
3
ns
CLKOUT25M pin output falling time
tCf
——
3
ns
tCf
tCH
tCcyc
tCr
tCL
CLKOUT pin output
Test Conditions VOH = 0.7 × VCC, VOL = 0.3 × VCC, C = 30pF
tCf
tCH
tCcyc
tCr
tCL
CLKOUT25M pin output
Test Conditions VOH = 0.7 × VCC, VOL = 0.3 × VCC, C = 30pF



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