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RX72N Datasheet(PDF) 132 Page - Renesas Technology Corp |
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RX72N Datasheet(HTML) 132 Page - Renesas Technology Corp |
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132 / 179 page ![]() R01DS0343EJ0120 Rev.1.20 Page 132 of 179 Nov 15, 2023 RX72N Group 2. Electrical Characteristics Note: tIICcyc: RIIC internal reference clock (IICφ) cycle Note 1. The value within parentheses is applicable when the value of the ICMR3.NF[1:0] bits is 11b while the digital filter is enabled by the setting ICFER.NFE = 1. Note 2. Cb is the total capacitance of the bus lines. Figure 2.62 RIIC Bus Interface Input/Output Timing SDA0 to SDA2 SCL0 to SCL2 VIH VIL tSTAH tSCLH tSCLL P*1 S*1 tSf tSr tSCL tSDAH tSDAS tSTAS tSP tSTOS P*1 tBUF Test conditions VIH = 0.7 × VCC, VIL = 0.3 × VCC VOL = 0.6 V, IOL = 6 mA (ICFER.FMPE = 0) VOL = 0.4 V, IOL = 15 mA (ICFER.FMPE = 1) Sr*1 Note 1. S, P, and Sr indicate the following conditions. S: Start condition P: Stop condition Sr: Restart condition |
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