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S7G2 Datasheet(PDF) 8 Page - Renesas Technology Corp |
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S7G2 Datasheet(HTML) 8 Page - Renesas Technology Corp |
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8 / 117 page ![]() R01DS0262EU0150 Rev.1.50 Page 8 of 117 Sep 24, 2025 S7G2 Datasheet 1. Overview Data Operation Circuit (DOC) The Data Operation Circuit (DOC) compares, adds, and subtracts 16-bit data. See section 52, Data Operation Circuit (DOC) in Userʼs Manual. Sampling Rate Converter (SRC) The Sampling Rate Converter (SRC) converts the sampling rate of data produced by various audio decoders, such as the WMA, MP3, and AAC. Both 16-bit stereo and monaural data are supported. See section 42, Sampling Rate Converter (SRC) in Userʼs Manual. Table 1.13 Security Feature Functional description Secure Crypto Engine 7 (SCE7) Security algorithms: - Symmetric algorithms: AES, 3DES, and ARC4 - Asymmetric algorithms: RSA, DSA, and ECC. Other support features: - TRNG (True Random Number Generator) - Hash-value generation: SHA1, SHA224, SHA256, GHASH, and MD5 - 128-bit unique ID. Table 1.14 I/O ports Feature Functional description I/O ports I/O ports for the 224-pin BGA - I/O pins: 163 - Input pins: 9 - Pull-up resistors: 164 - N-ch open-drain outputs: 163 - 5-V tolerance: 22 I/O ports for the 176-pin BGA, 176-pin LQFP - I/O pins: 117 - Input pins: 9 - Pull-up resistors: 118 - N-ch open-drain outputs: 117 - 5-V tolerance: 16 I/O ports for the 145-pin LGA, 144-pin LQFP - I/O pins: 95 - Input pins: 9 - Pull-up resistors: 96 - N-ch open-drain outputs: 95 - 5-V tolerance: 21 I/O ports for the 100-pin LQFP - I/O pins: 61 - Input pins: 9 - Pull-up resistors: 62 - N-ch open-drain outputs: 61 - 5-V tolerance: 14 Table 1.12 Data processing (2 of 2) Feature Functional description |
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