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ST7LITE3XF2 Datasheet(PDF) 33 Page - STMicroelectronics |
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ST7LITE3XF2 Datasheet(HTML) 33 Page - STMicroelectronics |
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33 / 173 page  ST7LITE3xF2 33/173 SYSTEM INTEGRITY MANAGEMENT (Cont’d) 7.6.3 Low Power Modes 7.6.3.1 Interrupts The AVD interrupt event generates an interrupt if the corresponding Enable Control Bit (AVDIE) is set and the interrupt mask in the CC register is re- set (RIM instruction). Mode Description WAIT No effect on SI. AVD interrupts cause the device to exit from Wait mode. HALT The SICSR register is frozen. The AVD becomes inactive and the AVD in- terrupt cannot be used to exit from Halt mode. Interrupt Event Event Flag Enable Control Bit Exit from Wait Exit from Halt AVD event AVDF AVDIE Yes No 1 |
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