Micrel, Inc.

MIC3002

July 2007

5

M9999-073107-B

List of Figures

Figure 1. MIC3002 Block Diagram ................................................................................................................................ 18

Figure 2. Analog-to-Digital Converter Block Diagram ................................................................................................... 18

Figure 3. Internal Calibration RX Power Linear Approximation .................................................................................... 25

Figure 4. RXPOT Block Diagram .................................................................................................................................. 25

Figure 5. MIC3002 APC and Modulation Control Block Diagram ................................................................................ 26

Figure 6. Programmable Feedback Resistor ................................................................................................................ 26

Figure 7. Transmitter Configurations Supported by MIC3002 ..................................................................................... 26

Figure 8. VMOD Configured as Voltage Output with Gain .......................................................................................... 27

Figure 9. MIC3002 Power-ON Timing.......................................................................................................................... 28

Figure 10. Fault Comparator Logic ............................................................................................................................... 28

Figure 11. Saturation Detector ...................................................................................................................................... 29

Figure 12. RXLOS Comparator Logic ........................................................................................................................... 29

Figure 13. Control and Status I/O Logic........................................................................................................................ 33

Figure 14. Transmitter ON-OFF Timing ....................................................................................................................... 34

Figure 15. Initialization Timing with TXDISABLE Asserted.......................................................................................... 34

Figure 16. Initialization Timing with TXDISABLE Not Asserted .................................................................................. 34

Figure 17. Loss-of-Signal (LOS) Timing ...................................................................................................................... 35

Figure 18. Transmit Fault Timing .................................................................................................................................. 28

Figure 19. Successfully Clearing a Fault Condition ..................................................................................................... 36

Figure 20. Unsuccessful Attempt to Clear a Fault ....................................................................................................... 36

Figure 21. Write Byte Protocol ..................................................................................................................................... 38

Figure 22. Read Byte Protocol ..................................................................................................................................... 38

Figure 23. Read_Word Protocol................................................................................................................................... 38

Figure 24. Four-Byte Page_White Protocol ................................................................................................................. 39