MICRF113 datasheet(14/20 Pages) MICREL

14 / 20 page

Micrel, Inc.

MICRF113

June 2008

M9999-060208

(408) 944-0800

R7, Ω

Output Power, dBm

IDD, mA

6.7

8.5

6.3

100

8.0

6.2

500

1.6

4.13

1000

-3.8

4.87

Output Power Versus External Resistor at 315MHz

R7, Ω

Output Power, dBm

IDD, mA

8.68

7.5

8.34

7.33

100

8.02

7.3

500

4.34

6.3

1000

0.42

5.5

Output Power Versus External Resistor at 433.92 MHz

Output Power ON-OFF Control

There are two ways to enable the PA output power.

First, by supplying the ASK signal with VDD applied

continuously, resulting in a Mark and Space RF output

condition. A second method involves applying both VDD

and ASK synchronously. The second method allows for

longer battery usage since the battery is disconnected

during non-activation. Figure 7 shows the RF output time

response since VDD and the ASK are applied to the

MICRF113. The RF output response, as a function of

VDD, is typically less then 1.25mSec. This measurement

was done using the circuitry shown in Figure 2.

Note: The ASK signal should never be applied before VDD.

RF Output Response as a Function of VDD and ASK

Figure 7. RF Output Response (VDD and ASK)

Output Matching Network

Part of the function of the output network is to attenuate

the second and third harmonics. When matching to a

transmit frequency, care must be taken both to optimize

for maximum output power, and to attenuate unwanted

harmonics.

Layout Issues

PCB Layout is a primary concern for achieving optimum

performance and consistent manufacturing results. Care

must used with the orientation of components to ensure

that they do not couple or decouple the RF signal. PCB

trace length should be short to minimize parasitic

inductance (1 inch ~ 20nH). For example, depending

upon inductance values, a 0.5 inch trace can change the

inductance by as much as 10%. To reduce parasitic

inductance, the practice of using wide traces and a

ground plane under the signal traces is recommended.

Vias with low value inductance should be used for

components requiring a connection-to-ground.

Antenna Layout

Directivity is affected by antenna trace layout. No ground

plane should be under the antenna trace. For consistent

performance, components should not be placed inside

the loop of the antenna. Gerber formats (see Figure 8,

for a suggested layout) can be obtained from the Micrel

web site at: http://www.micrel.com.

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