AD8341_V01 datasheet(12/20 Pages) AD

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AD8341

Data Sheet

Rev. B | Page 12 of 20

APPLICATIONS INFORMATION

USING THE AD8341

The AD8341 is designed to operate in a 50 Ω impedance system.

Figure 30 illustrates an example where the RF input is driven in

a single-ended fashion while the differential RF output is converted

to a single-ended output with an RF balun. The baseband controls

for the I and Q channels are typically driven from differential

DAC outputs. The power supplies, VPRF and VPS2, must be

bypassed appropriately with 0.1 µF and 100 pF capacitors. Low

inductance grounding of the CMOP and CMRF common pins

is essential to prevent unintentional peaking of the gain.

RF INPUT AND MATCHING

The input impedance of the AD8341 is defined by the charac-

teristics of the polyphase network. The capacitive component of

the network causes its impedance to roll-off with frequency albeit

at a rate slower than 6 dB/octave. By using matching inductors

on the order of 1.2 nH in series with each of the RF inputs, RFIP

and RFIM, a 50 Ω match is achieved with a return loss of >10 dB

over the operating frequency range.

Different matching inductors can improve matching over a

narrower frequency range. The single-ended and differential

input impedances are exactly the same.

Ω

100pF

RFIM

RFIP

PHASE

1.2nH

100pF 1.2nH

~1VDC

Figure 29. RF Input Interface to the AD8341 Showing

Coupling Capacitors and Matching Inductors

The RFIP and RFIM must be ac-coupled through low loss series

capacitors as shown in Figure 29. The internal dc levels are at

approximately 1 V. For single-ended operation, one input is

driven by the RF signal while the other input is ac grounded.

DSOP

VPS2

VPRF

CMRF

RFIM

RFIP

CMOP

RFOM

RFOP

QFLP

CMOP

CMRF

VPRF

IFLP

AD8341

C12

(SEE TEXT)

C11

(SEE TEXT)

0.1

µF

1.2nH

100pF

1.2nH

100pF

IBBM

IBBP

INPUT

QBBP

QBBM

120nH

C14

0.1

µF

C10

0.1

µF

C18

100pF

C17

100pF

ETC1-1-13

OUTPUT

DISABLE

0.1

µF

0.1

µF

100pF

Figure 30. Basic Connections

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