74HC_HCT377

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Product data sheet

Rev. 4 — 24 February 2016

4 of 18

NXP Semiconductors

74HC377; 74HCT377

Octal D-type flip-flop with data enable; positive-edge trigger

5.

Pinning information

5.1 Pinning

5.2 Pin description

6.

Functional description

[1]

H = HIGH voltage level;

h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;

L = LOW voltage level;

l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;

X = don’t care;

 = LOW-to-HIGH clock transition.

Fig 5.

Pin configuration

Table 2.

Pin description

Symbol

Pin

Description

E

1

data enable input (active LOW)

Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7

2, 5, 6, 9, 12, 15, 16, 19

flip-flop output

D0, D1, D2, D3, D4, D5, D6, D7

3, 4, 7, 8, 13, 14, 17, 18

data input

GND

10

ground (0 V)

CP

11

clock input (LOW-to-HIGH, edge triggered)

VCC

20

supply voltage

Table 3.

Function table[1]

Operating modes

Inputs

Outputs

CP

E

Dn

Qn

load “1”



lh

H

load “0”



llL

hold (do nothing)

-

h

X

no change

X

H

X

no change