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UG-2131 Datasheet(PDF) 4 Page - Analog Devices

Part # UG-2131
Description  Evaluating the LTC9101-2A/LTC9101-2 and LTC9102 48-Channel IEEE 802.3at/bt PSE
PDF  10 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

UG-2131 Datasheet(HTML) 4 Page - Analog Devices

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User Guide
EVAL-LTC9101-2
QUICK START PROCEDURE
analog.com
Rev. 0 | 4 of 10
Follow the procedure below and see Figure 2
through Figure 4, and Table 2 through Table 4 for
proper equipment setup and default configuration.
NOTE: Step 1 only applies to the EVAL-LTC9101-2.
1. For autonomous operation with the EVAL-LTC9101-2, set the
jumper PWRMD-1 (JP1) on the DC3017A-B motherboard to
PM3 through PM7. See Table 2 for all PWRMD-1 options and
the PWRMD Settings section for more information.
2. On the DC3017A-B motherboard, set the address switches AD2
and AD3 (SW5) to LO and JP22 (AD1) to LO for the default
0x20 base I2C address.
3. On the DC3017A-B motherboard, set the CFG1 (JP20) and
CFG1 (JP21) jumpers to HI to set CFG[1:0] logically to 11b to
enable all ports. See Table 3 for more configuration options.
4. Align pin 1 of the 16-pin male connector P1 on the DC3159A
daughter card with pin 1 of the 16-pin female connector J11
on the DC3017A-B motherboard as shown in Figure 3. The six
male connectors and six female sockets should match. Keyed
pins in J16 and J12 assist with the alignment shown in Figure
4. Carefully push the daughter card straight down until the male
and female connectors are flush with each other.
5. Connect a supply to the DC3017A-B motherboard with the posi-
tive rail to POS INPUT (+) and negative rail to NEG INPUT (-)
as shown in Figure 4. Use a power supply capable of sourcing
the maximum power for all ports to be tested. Ramp the supply
up to within the recommended voltage range specified in Table
4.
NOTE: Banana jacks J8 and J10 should only be used for up to
15 A of supply current. Use the lug nut terminals J7 and J9 for
supply currents of up to 50 A; enough for 24 ports at maximum
IEEE 802.3bt power.
6. Connect the DC590B or other I2C host controller at 14-pin
connector (J1) as shown in Figure 4. Host control is required for
EVAL-LTC9101-2A.
7. Connect IEEE 802.3af, 802.3at, or 802.3bt PDs to the mother-
board’s RJ45 connectors J3 and J4, as shown in Figure 4.
Table 2. EVAL-LTC9101-2 PWRMD-1 (JP1) Jumper Settings
PWRMD-1
Jumper Setting
RPWRMD
Resistor
Mode
PM0
OPEN
DISABLED
PM1
24.3k
RESERVED
PM2
18.7k
RESERVED
PM3
14.3k
Class 4: 25.5W
PM4
11.0k
Class 5: 40W
PM5
8.45k
Class 6: 51W
PM6
6.49k
Class 7: 62W
PM7
1.00k
Class 8: 71.3W
Table 3. EVAL-LTC9101-2-KIT CFG1 and CFG0 Jumper Settings
Jumper
# of Analog
Controllers
Number of Channels
CFG1 (JP21) CFG0 (JP20)
LO
LO
1
12
LO
HI
2
24
HI
LO
3
36
HI
HI
4
48
Table 4. EVAL-LTC9101-2-KIT Power Supply Voltage per PSE Type
IEEE 802.3 Type,
Max Class
Supply Voltage Range
Type 2, up to Class 4
Type 3, up to Class 6
51 V to 57 V
Type 4, up to Class 8
53 V to 57 V



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