Operation modes

M48T08, M48T08Y, M48T18

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Table 4.

Write mode AC characteristics

Data retention mode

RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write

become high impedance, and all inputs are treated as “Don't care.”

Note:

A power failure during a WRITE cycle may corrupt data at the currently addressed location,

decoupling of the power supply lines is recommended.

Symbol

1.

M48T08/M48T18/T08Y

Unit

–100/–10 (T08Y)

–150/–15 (T08Y)

MinMax

MinMax

WRITE Cycle Time

100

150

ns

Address Valid to WRITE Enable Low

0

0

ns

Address Valid to Chip Enable 1 Low

0

0

ns

Address Valid to Chip Enable 2 High

0

0

ns

WRITE Enable Pulse Width

80

100

ns

Chip Enable 1 Low to Chip Enable 1 High

80

130

ns

Chip Enable 2 High to Chip Enable 2 Low

80

130

ns

WRITE Enable High to Address Transition

10

10

ns

Chip Enable 1 High to Address Transition

10

10

ns

Chip Enable 2 Low to Address Transition

10

10

ns

Input Valid to WRITE Enable High

50

70

ns

Input Valid to Chip Enable 1 High

50

70

ns

Input Valid to Chip Enable 2 Low

50

70

ns

WRITE Enable High to Input Transition

5

5

ns

Chip Enable 1 High to Input Transition

5

5

ns

Chip Enable 2 Low to Input Transition

5

5

ns

WRITE Enable Low to Output Hi-Z

50

70

ns

Address Valid to WRITE Enable High

80

130

ns

Address Valid to Chip Enable 1 High

80

130

ns

Address Valid to Chip Enable 2 Low

80

130

ns

WRITE Enable High to Output Transition

10

10

ns