ST95020M1TR datasheet(5/18 Pages) STMICROELECTRONICS

5 / 18 page

AI01272

HOLD

Control Logic

High Voltage

Generator

I/O Shift Register

Address Register

and Counter

Data

16 Bytes

X Decoder

Block

Protect

Status

Figure 5. Block Diagram

During a write to the memory operation to the

memory array, all bits BP1, BP0, WEL, WIP are

valid and can be read. During a write to the status

can be read. The values of BP1 and BP0 read at

that time correspond to the previouscontents of the

status register.

The Write-In-Process (WIP) read-only bit indicates

whether the Memory is busy with a write operation.

When set to a ’1’ a write is in progress, when set to

a ’0’ no write is in progress.

The Write Enable Latch (WEL) read-only bit indi-

cates the status of the write enable latch. When set

to a ’1’ the latch is set, when set to a ’0’ the latch is

reset. The Block Protect (BP0 and BP1) bits indi-

cate the extent of the protection employed. These

bits are set by the user issuing the WRSR instruc-

tion. These bits are non-volatile.

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ST95040, ST95020, ST95010

ST95020M1TR Datasheet(PDF) 5 Page - STMicroelectronics