16-Terminal TQFN PACKAGE

15

16

1

2

VIN

OUTN

3

4

OUTN

VAUX

13

14

6

5

8

12

11

10

9

PGND

OUTP

OUTP

PGND

Exposed

ThermalDie

RTEPackage

(TopView)

7

P0081-01

TPS65136

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

OPTIONS

ORDERING P/N

PACKAGE

PACKAGE MARKING

–40°C to 85°C

TPS65136RTE

RTE

CCO

(1)

The RTE package is available in tape and reel. Add R suffix (TPS65136RTER) to order quantities of 3000 parts per reel. For the most

current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at

www.ti.com.

(2)

Contact the factory for other output voltage options.

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

NO.

EN

8

I

Input pin to enable the device. Pulling this pin high enables the device. This pin has an internal 500-k

Ω

pulldown resistor.

FB

7

I

Feedback regulation input for the positive output voltage rail

FBG

6

I

Feedback regulation input

GND

5

–

Analog ground

L1

13, 14

I/O

Inductor terminal

L2

15, 16

I/O

Inductor terminal

OUTN

2, 3

O

Negative output

OUTP

9, 10

O

Positive output

PGND

11, 12

–

Power GND

VAUX

4

O

Reference voltage output. This pin requires a 100-nF capacitor for stability.

VIN

1

I

Input supply

Exposed thermal die

–

Connect this pad to analog GND.

2

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Copyright © 2008, Texas Instruments Incorporated

Product Folder Link(s): TPS65136