DDC316 datasheet(19/24 Pages) TI

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VOLTAGE REFERENCE

10kW

10 F

0.47 F

+5V

VREF (4A,6A,6B)

REF3140

10 F

VREF_IN (4B)

0.1 F

DDC316

0.1 F

External VREF Buffer

Internal VREF Buffer

OPA350

0.1 F

+5V

10kW

10 F

0.1 F

10 F

0.47 F

+5V

REF3140

VREF (4A,6A,6B)

VREF_IN (4B)

0.1 F

DDC316

www.ti.com .................................................................................................................................................................................................. SBAS370 – MARCH 2008

quality capacitors with low ESR (< 1

Ω) are necessary

for optimum performance. High ESR capacitors will

The reference voltage is used to reset the integration

lead to oscillation of the internal buffer. Ceramic

capacitors before an integration cycle begins. It is

capacitors

with

ESR

Ω

100kHz

are

also used by the ADCs when they measure the

recommended.

voltage stored on the integrators after an integration

cycle ends. During this sampling,

the

external

reference must supply the charge needed by the

ADCs. For an integration time of 20

µs, this charge

translates

average

VREF

current

approximately 270

µA. The amount of charge needed

by the ADC is independent of the integration time;

therefore, increasing the integration time lowers the

average current. For example, an integration time of

µs lowers the average VREF current to 135µA.

It is critical that VREF be stable during the different

modes of operation (see Figure 7). The ADC

measures the voltage on the integrator with respect

Figure 14. Recommended Circuit when Using the

to VREF. Since the integrator capacitors are initially

Internal VREF Buffer

reset to VREF, any drop in VREF, from the time the

capacitors are reset to the time when the converter

measures the integrator output, introduces an offset.

It is also important that VREF be stable over longer

The internal buffer can be turned off using the control

periods

time

because

changes

VREF

bits as explained in the Configuring the Modes

correspond directly to changes in the full-scale range.

section under Bit 4 and Table 10. For this option,

Finally, VREF should introduce as little additional

configure the driving circuit as illustrated in Figure 15.

noise as possible. For these reasons, it is strongly

The voltage reference is generated by a +4.096V

recommended that the external reference source be

reference. A low-pass filter to reduce noise connects

buffered with an operational amplifier.

the reference to an operational amplifier configured

buffer.

The

VREF_IN

must

left

The DDC316 offers two options for driving the

disconnected.

reference voltage: through an external buffer or

through an internal buffer. In both the cases, the

This amplifier used as buffer should have low noise

reference voltage is generated external to the chip

and input/output common-mode ranges that support

using an accurate reference, such as the REF3140.

VREF. Even though the circuit in Figure 15 might

appear to be unstable as a result of the large output

capacitors,

works

well

for

most

operational

amplifiers.

not

recommended

that

series

The DDC316 provides an internal VREF buffer to

resistance be placed in the output lead to improve

drive the four on-chip ADCs. The reference voltage

stability because it can cause a drop in VREF and

must be provided at VREF_IN (pin 4B), as shown in

produce large offsets.

Figure 14. The external capacitors at the VREF pins

are necessary to stabilize the internal buffer. It is

recommended that these capacitors be placed as

close as possible to the device under test. Also, good

Figure 15. Recommended Circuit when Using an External VREF Buffer

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