THS7374IPW datasheet(19/37 Pages) TI

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INPUT MODE OF OPERATION: DC

Level

Shift

Internal

Circuitry

800kW

Input

INPUT MODE OF OPERATION: AC SYNC TIP

THS7374

www.ti.com....................................................................................................................................................................................................... SLOS590 – JULY 2008

of current. Thus, to avoid clipping, the allowable input

is [(2.9 V/2) – 0.15 V] = 1.3 V. This calculation is true

The

THS7374

allows

for

both

ac-coupled

and

for up to the maximum recommended 5-V power

dc-coupled inputs. Many DACs or video encoders can

supply that allows about a [(4.9 V/2) – 0.15 V] = 2.3 V

be dc-connected to the THS7374. One of the

input range while avoiding clipping on the output.

drawbacks to dc coupling is when 0 V is applied to

the input. Although the input of the THS7374 allows

The input impedance of the THS7374 in this mode of

for a 0-V input signal with no issues, the output swing

operation is dictated by the internal 800-k

Ω pull-down

of a traditional amplifier cannot yield a 0-V signal,

resistor, as shown in Figure 37. Note that the internal

resulting in possible clipping. This condition is true for

voltage shift does not appear at the input pin, but only

any single-supply amplifier as a result of the output

the output pin. This configuration ensures there is no

transistor

limitations.

Both

CMOS

and

bipolar

issue with interfacing to the source.

transistors cannot go to 0 V while sinking current.

This characterization of a transistor is also the same

reason why the highest output voltage is always less

than the power-supply voltage when sourcing current.

This output clipping can reduce the sync amplitudes

(both horizontal and vertical sync) on the video

signal. A problem occurs if the receiver of this video

signal uses an AGC loop to account for losses in the

transmission line. Some video AGC circuits derive

gain from the horizontal sync amplitude. If clipping

occurs on the sync amplitude, then the AGC circuit

can increase the gain too much—resulting in too

much luma and/or chroma amplitude gain correction.

This overcorrection may result in a picture with an

Figure 37. Equivalent DC Input Mode Circuit

overly bright display with too much color saturation.

Other AGC circuits use the chroma burst amplitude

for amplitude control, and a reduction in the sync

signals does not alter the proper gain setting.

CLAMP

However, it is good engineering design practice to

Some video DACs or encoders are not referenced to

ensure that saturation/clipping does not take place.

ground but rather to the positive power supply. The

Transistors always take a finite amount of time to

resulting video signals are generally too high of a

come out of saturation. This saturation could possibly

voltage for a dc-coupled video buffer to function

result in timing delays or other aberrations on the

properly. To account for this scenario, the THS7374

signals.

incorporates a sync-tip clamp (STC) circuit. This

eliminate

saturation/clipping

problems,

the

function requires a capacitor (nominally 0.1

µF) to be

THS7374 has a 150-mV input level shift feature. This

in series with the input. Note that while the term

feature takes the input voltage and adds an internal

sync-tip-clamp is used throughout this document, it

+150-mV shift to the signal. Since the THS7374 also

should be noted that the THS7374 would probably be

has a gain of 6 dB (2 V/V), the resulting output with a

better termed to be a dc restoration circuit based on

0-V applied input signal is approximately 300 mV.

how this function is performed. This circuit is an

The THS7374 rail-to-rail output stage can create this

active clamp circuit and not a passive diode clamp

output level while connected to a typical video load.

function.

This feature ensures that no saturation/clipping of the

The input to the THS7374 has an internal control loop

sync signals occur. This shift is constant, regardless

that sets the lowest input applied voltage to clamp at

of the input signal. For example, if a 1-V input is

ground (0 V). By setting the reference at 0-V, the

applied, the output is at 2.3 V.

THS7374 allows a dc-coupled input to also function.

Because the internal gain is fixed at +6 dB, the gain

Therefore,

the

STC

considered

transparent

dictates what the allowable linear input voltage range

because it does not operate unless the input signal

can be without clipping concerns. For example, if the

goes below ground. The signal then goes through the

power supply is set to 3.0 V, the maximum outputis

same 150-mV level shifter, resulting in an output

approximately 2.9 V while driving a significant amount

voltage low level of 300 mV. If the input signal tries to

go below 0 V, the internal control loop of the

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