TPS73601DBVT datasheet(12/26 Pages) TI

12 / 26 page

N(mVRMS)

+ 8.5

mVRMS

OUT(V)

(3)

DROPOUT VOLTAGE

BOARD LAYOUT RECOMMENDATION TO

TRANSIENT RESPONSE

INTERNAL CURRENT LIMIT

ENABLE PIN AND SHUTDOWN

TPS736xx

SBVS038R – SEPTEMBER 2003 – REVISED MAY 2008 .................................................................................................................................................. www.ti.com

An internal 27k

Ω resistor in series with the noise

When shutdown capability is not required, EN can be

reduction pin (NR) forms a low-pass filter for the

connected to VIN. However, the pass gate may not be

voltage reference when an external noise reduction

discharged using this configuration, and the pass

capacitor, CNR, is connected from NR to ground. For

transistor may be left on (enhanced) for a significant

CNR = 10nF, the total noise in the 10Hz to 100kHz

time after VIN has been removed. This scenario can

bandwidth is reduced by a factor of ~3.2, giving the

result in reverse current flow (if the IN pin is low

approximate relationship:

impedance) and faster ramp times upon power-up. In

addition, for VIN ramp times slower than a few

milliseconds,

the

output

may

overshoot

upon

power-up.

for CNR = 10nF.

This noise reduction effect is shown as RMS Noise

The TPS736xx uses an NMOS pass transistor to

Voltage vs CNR in the Typical Characteristics section.

achieve extremely low dropout. When (VIN – VOUT) is

The TPS73601 adjustable version does not have the

less than the dropout voltage (VDO), the NMOS pass

NR pin available. However, connecting a feedback

device is in its linear region of operation and the

capacitor, CFB, from the output to the feedback pin

input-to-output resistance is the RDS-ON of the NMOS

(FB)

reduces

output

noise

and

improves

load

pass element.

transient performance.

For large step changes in load current, the TPS736xx

The TPS736xx uses an internal charge pump to

requires a larger voltage drop from VIN to VOUT to

develop an internal supply voltage sufficient to drive

avoid degraded transient response. The boundary of

the gate of the NMOS pass element above VOUT. The

this transient dropout region is approximately twice

charge pump generates ~250

µV of switching noise at

the dc dropout. Values of VIN – VOUT above this line

~4MHz; however, charge-pump noise contribution is

ensure normal transient response.

negligible at the output of the regulator for most

Operating in the transient dropout region can cause

values of IOUT and COUT.

an increase in recovery time. The time required to

recover from a load transient is a function of the

magnitude of the change in load current rate, the rate

IMPROVE PSRR AND NOISE PERFORMANCE

change

load

current,

and

the

available

headroom

(VIN to VOUT voltage drop). Under

To improve ac performance such as PSRR, output

worst-case conditions [full-scale instantaneous load

noise, and transient response, it is recommended that

change with (VIN – VOUT) close to dc dropout levels],

the board be designed with separate ground planes

the TPS736xx can

take

couple

hundred

for VIN and VOUT, with each ground plane connected

microseconds to return to the specified regulation

only at the GND pin of the device. In addition, the

accuracy.

ground connection for the bypass capacitor should

connect directly to the GND pin of the device.

The low open-loop output impedance provided by the

NMOS

pass

element

voltage

follower

The TPS736xx internal current limit helps protect the

configuration allows operation without an output

regulator during fault conditions. Foldback current

capacitor

for

many

applications.

with

any

limit helps to protect the regulator from damage

regulator, the addition of a capacitor (nominal value

during output short-circuit conditions by reducing

µF) from the OUT pin to ground will reduce

current limit when VOUT drops below 0.5V. See

undershoot magnitude but increase its duration. In

Figure 12 in the Typical Characteristics section.

the adjustable version, the addition of a capacitor,

CFB, from the OUT pin to the FB pin will also improve

the transient response.

The enable pin (EN) is active high and is compatible

with standard TTL-CMOS levels. A VEN below 0.5V

(max) turns the regulator off and drops the GND pin

current to approximately 10nA. When EN is used to

shutdown the regulator, all charge is removed from

the pass transistor gate, and the output ramps back

up to a regulated VOUT (see Figure 23).

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