ADL5502

Preliminary Technical Data

Rev. PrD (04/20/2008) | Page 10 of 14

APPLICATIONS

BASIC CONNECTIONS

Figure 17 shows the basic connections for the ADL5502. The

device is powered by a single supply between 2.5 V and 3.5 V,

with a quiescent current of 5 mA. The VPOS pin is decoupled

using 100 pF and 0.1 μF capacitors.

Placing a single 75 Ω resistor at the RF input provides a

broadband match of 50 Ohms. More precise resistive or

reactive matches can be applied for narrow frequency band use

(see impedance plot, Figure 7).

The rms averaging can be augmented by placing additional

capacitance at CFLT. The ac residual can be further reduced by

increasing the output capacitance, COUT. The combination of

the internal 100 Ω output resistance and COUT produce a low-

pass filter to reduce output ripple of the VRMS output. Note

that a minimum of 4.7 nF capacitive load should be kept on the

RMS output.

To operate the device in peak-hold mode, the control line must be

temporally set to HI (reset or envelope mode) and then set back to

LO (peak-hold mode). This allows the ADL5502 to be initialize to

a known state.

Figure 17. Basic Connections for ADL5502

EVALUATION BOARD

Figure 18 shows the schematic of the ADL5502 evaluation

board. The board is powered by a single supply in the 2.5 V to

3.5 V range. The power supply is decoupled by 100 pF and

0.1 μF capacitors. Table 4 details the various configuration

options of the evaluation board. Figure 19 and Figure 20 show

the component and circuit layouts of the evaluation board.

The RF input has a broadband match of 50 Ohms using a single

75 Ω resistor at R10. More precise matching at spot frequencies

is possible using the pads for components C15, C16, and R10.

The two outputs, accessible via the SMAs labeled VRMS and

VENV, provide the rms response and the envelope/peak-hold

vmeasurement of the RF input power level. The device must be

enabled by switching SW1 to HI (setting the switch to the

position opposite that of the “SW1” label).

The device is place in peak-hold mode by placing switch SW2 in

the position closes to the “SW2” label. Envelope-tracking mode is

possible by setting SW2 in the opposite switch position (away from

the “SW2” label). A signal generator can drive the control mode

via the SMA labeled CNTL (see Table 4 for more details).

OPERATING IN PEAK-HOLD MODE

To operate the device in peak-hold mode, the control line must be

temporally set to HI (envelope mode) and then set back to LO

(peak-hold mode). This allows the ADL5502 to be initialize to a

known state.

For envelope mode or rms use only, the control line can simply be

set to HI.