STD2NC70Z datasheet(1/10 Pages) STMICROELECTRONICS

Part #	STD2NC70Z

Description	N-CHANNEL 700V - 4.1ohm - 2.3A DPAK/IPAK Zener-Protected PowerMESH™ III MOSFET

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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April 2001

STD2NC70Z

STD2NC70Z-1

N-CHANNEL 700V - 4.1

Ω - 2.3A DPAK/IPAK

Zener-Protected PowerMESH™III MOSFET

s

TYPICAL RDS(on) = 4.1Ω

s

EXTREMELY HIGH dv/dt AND CAPABILITY

GATE TO - SOURCE ZENER DIODES

s

100% AVALANCHE TESTED

s

VERY LOW GATE INPUT RESISTANCE

s

GATE CHARGE MINIMIZED

DESCRIPTION

The third generation of MESH OVERLAY™ Power

MOSFETs for very high voltage exhibits unsur-

passed on-resistance per unit area while integrat-

ing back-to-back Zener diodes between gate and

source. Such arrangement gives extra ESD capa-

bility with higher ruggedness performance as re-

quested

by a

large

variety

of single-switch

applications.

APPLICATIONS

s

SINGLE-ENDED SMPS IN MONITORS,

COMPUTER AND INDUSTRIAL APPLICATION

s

WELDING EQUIPMENT

ABSOLUTE MAXIMUM RATINGS

(•)Pulse width limited by safe operating area

TYPE

VDSS

RDS(on)

ID

STD2NC70Z

STD2NC70Z-1

700V

< 4.7

Ω

< 4.7

Ω

2.3 A

Symbol

Parameter

Value

Unit

VDS

Drain-source Voltage (VGS = 0)

700

V

VDGR

Drain-gate Voltage (RGS = 20 kΩ)

700

V

VGS

Gate- source Voltage

± 25

V

ID

Drain Current (continuos) at TC = 25°C

2.3

A

ID

Drain Current (continuos) at TC = 100°C

1.45

A

IDM (q)

Drain Current (pulsed)

9.2

A

PTOT

Total Dissipation at TC = 25°C

55

W

Derating Factor

0.44

W/°C

IGS

Gate-source Current (DC)

±50

mA

VESD(G-S)

Gate source ESD(HBM-C=100pF, R=1.5K

Ω)

1.5

KV

dv/dt (1)

Peak Diode Recovery voltage slope

3

V/ns

Tstg

Storage Temperature

–65 to 150

°C

Tj

Max. Operating Junction Temperature

150

°C

(1)ISD ≤2.3A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX

DPAK

3

2

1

3

IPAK

(Add Suffix “T4” for Tape & Reel)

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