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C161V Datasheet(PDF) 13 Page - Siemens Semiconductor Group |
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C161V Datasheet(HTML) 13 Page - Siemens Semiconductor Group |
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13 / 260 page  Semiconductor Group 2-1 10Jul97@15:19h Architectural Overview / C161 2 Architectural Overview The architecture of the C161 combines the advantages of both RISC and CISC processors in a very well-balanced way. The sum of the features which are combined result in a high performance microcontroller, which is the right choice not only for today’s applications, but also for future engineering challenges. The C161 not only integrates a powerful CPU core and a set of peripheral units into one chip, but also connects the units in a very efficient way. One of the four buses used concurrently on the C161 is the XBUS, an internal representation of the external bus interface. This bus provides a standardized method of integrating application-specific peripherals to produce derivates of the standard C161. Figure 2-1 C161 Functional Block Diagram |
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