TS1871ILT datasheet(6/26 Pages) STMICROELECTRONICS

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Electrical characteristics

TS1871-TS1872-TS1874

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Table 4.

Electrical characteristics at VCC = +3V

with VDD = 0V, CL & RL connected to VCC/2, and Tamb = 25°C (unless otherwise specified)

(1)

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

Vio

Input offset voltage

Vicm = Vout = VCC/2

TS1871A/2A/4A

Tmin ≤ Tamb ≤ Tmax

TS1871/2/4

Tmin ≤ Tamb ≤ Tmax

0.1

1.5

ΔVio

Input offset voltage drift

µV/°C

Iio

Input offset current

Vicm = Vout = VCC/2

(2)

Tmin ≤ Tamb ≤ Tmax

330

Iib

Input bias current

Vicm = Vout = VCC/2

(1)

Tmin ≤ Tamb ≤ Tmax

125

150

CMR

Common mode rejection ratio

20 log (

ΔVic/ΔVio)

≤ Vicm ≤ VCC, Vout = VCC/2

Tmin ≤ Tamb ≤ Tmax

Avd

Large signal voltage gain

Vout = 0.5V to 2.5V

RL = 2kΩ

RL = 600Ω

VOH

High level output voltage

Vid = 100mV

RL = 2kΩ

RL = 600Ω

Tmin ≤ Tamb ≤ Tmax, RL = 2kΩ

Tmin ≤ Tamb ≤ Tmax, RL = 600Ω

2.82

2.80

2.82

2.80

2.95

VOL

Low level output voltage

Vid = -100mV

RL = 2kΩ

RL = 600Ω

Tmin ≤ Tamb ≤ Tmax, RL = 2kΩ

Tmin ≤ Tamb ≤ Tmax, RL = 600Ω

115

120

160

120

160

Output source current

Vid = 100mV, VO = VDD

Output sink current

Vid = -100mV, VO = VCC

ICC

Supply current (per amplifier)

Vout = VCC/2

AVCL = 1, no load

Tmin ≤ Tamb ≤ Tmax

450

650

690

µA

GBP

Gain bandwidth product

RL = 10kΩ, CL = 100pF, f = 100kHz

1.7

MHz

Slew rate

RL = 10kΩ, CL = 100pF, AV = 1

0.42

0.6

V/µs

φm

Phase margin

CL = 100pF

Degrees

Input voltage noise

f = 1kHz

nV/

√Hz

THD

Total harmonic distortion

0.01

All parameter limits at temperatures different from 25°C are guaranteed by correlation.

Maximum values include unavoidable inaccuracies of the industrial tests.

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