STP24DP05

Feature description

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rise front of CLK the SDI data are ready for the sampling.

7.4

Phase two: “error detection”

The eight data bits must be set “1“ in order to set ON all the outputs during the detection.

The data are latched by LE/DM and after that the outputs are ready for the detection

process. When the micro controller switches the OE-R/DM to LOW, the device drives the

LEDs in order to analyze if an OPEN or SHORT condition has occurred.

The LEDs status will be detected at least in 1 microsecond and after this time the

microcontroller sets OE-R/DM in HIGH state and the output data detection result will go to

the microprocessor via SDO.

Detection mode and normal mode use both the same format data. As soon as all the

detection data bits are available on the serial line, the device may go back to normal mode

of operation.

Figure 14. SPI sequence to enter in detection mode - time diagram

OE-R/DM

LE/DM

Figure 15. Detection diagram