74VHCT245AMTR datasheet(1/13 Pages) STMICROELECTRONICS

Part #	74VHCT245AMTR

Description	OCTAL BUS TRANSCEIVER (3-STATE)

PDF	13 Pages

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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December 2004

s

HIGH SPEED: tPD = 4.5 ns (TYP.) at VCC = 5V

s

LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA=25°C

s

COMPATIBLE WITH TTL OUTPUTS:

VIH = 2V (MIN.), VIL = 0.8V (MAX)

s

POWER DOWN PROTECTION ON INPUTS

& OUTPUTS

s

SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s

BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s

OPERATING VOLTAGE RANGE:

VCC(OPR) = 4.5V to 5.5V

s

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 245

s

IMPROVED LATCH-UP IMMUNITY

s

LOW NOISE: VOLP = 0.9V (MAX.)

DESCRIPTION

The 74VHCT245A is an advanced high-speed

CMOS OCTAL BUS TRANSCEIVER (3-STATE)

fabricated

with

sub-micron silicon gate and

double-layer metal wiring C2MOS technology.

This IC is intended for two-way asynchronous

communication

between

data

busses;

the

direction of data transmission is determined by

DIR input. The enable input G can be used to

disable the device so that the busses are

effectively isolated.

All

inputs

and

outputs

are

equipped

with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

All floating bus terminals during High Z State must

be held HIGH or LOW.

74VHCT245A

OCTAL BUS

TRANSCEIVER (3-STATE)

Figure 1: Pin Connection And IEC Logic Symbols

Table 1: Order Codes

PACKAGE

T & R

SOP

74VHCT245AMTR

TSSOP

74VHCT245ATTR

TSSOP

SOP

Rev. 4

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