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ESDA6V1-4BC6 Datasheet(PDF) 4 Page - STMicroelectronics |
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ESDA6V1-4BC6 Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 6 page ![]() ESDA6V1-4BC6 4/6 Figure 8: Bidirectional protection for 0V biased signals The ESDA6V1-4BC6 array is the ideal product for use as board level protection of ESD sensitive semi- conductor components. The tiny SOT23-6L package allows design flexibility in the design of “crowded” boards where the space saving is at a premium. This enables to shorten the routing and can contribute to improve ESD perform- ance. 2. Circuit Board Layout Circuit board layout is a critical design step in the suppression of ESD induced transients. The following guidelines are recommended : ■ The ESDA6V1-4BC6 should be placed as near as possible to the input terminals or connectors. ■ Minimise the path length between the ESD suppressor and the protected device ■ Minimise all conductive loops, including power and ground loops ■ The ESD transient return path to ground should be kept as short as possible. ■ Use ground planes whenever possible. Figure 9: Ordering information scheme CONNECTOR DRIVER 1 2 3 6 5 4 ESDA 6V1 - 4B C6 ESD Array Breakdown Voltage (min) Number and type of lines protected Package 6V1 = 6.1 Volt 4B = 4 Bidirectional lines C6 = SOT23-6L |
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