TS4998 datasheet(25/33 Pages) STMICROELECTRONICS

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TS4998

Application information

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4.7

Footprint recommendation

Footprint soldering pad dimensions are given in Figure 72 on page 30. As discussed in the

previous section, the maximum allowable value for ambient temperature is dependent on

the thermal resistance junction to ambient RTHJA. Decreasing the RTHJA value causes better

power dissipation.

Based on best thermal performance, it is recommended to use 4-layer PCBs with vias to

effectively remove heat from the device. It is also recommended to use vias for 2-layer PCBs

to connect the package exposed pad to heatsink cooper areas placed on another layer.

For proper thermal conductivity, the vias must be plated through and solder-filled. Typical

thermal vias have the following dimensions: 1.2mm pitch, 0.3mm diameter.

Figure 65.

QFN16 footprint recommendation

4.8

Decoupling of the circuit

Two capacitors are needed to correctly bypass the TS4998: a power supply bypass

capacitor CS and a bias voltage bypass capacitor Cb.

The CS capacitor has particular influence on the THD+N at high frequencies (above 7kHz)

and an indirect influence on power supply disturbances. With a value for CS of 1µF, one can

expect THD+N performance similar to that shown in the datasheet.

In the high frequency region, if CS is lower than 1µF, then THD+N increases and

disturbances on the power supply rail are less filtered.

On the other hand, if CS is greater than 1µF, then those disturbances on the power supply

rail are more filtered.

The Cb capacitor has an influence on the THD+N at lower frequencies, but also impacts

PSRR performance (with grounded input and in the lower frequency region).

TS4998 Datasheet(PDF) 25 Page - STMicroelectronics