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AAT3603 Datasheet(PDF) 25 Page - Advanced Analogic Technologies |
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AAT3603 Datasheet(HTML) 25 Page - Advanced Analogic Technologies |
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25 / 35 page ![]() AAT3603178 Total Power Solution for Portable Applications PRODUCT DATASHEET 3603.2008.06.1.0 25 www .analogictech.com Reverse Battery Leakage The AAT3603 includes internal circuitry that eliminates the need for series blocking diodes, reducing solution size and cost as well as dropout voltage relative to con- ventional battery chargers. When the input supply is removed or when CHGIN goes below the AAT3603’s under voltage-lockout (UVLO) voltage, or when CHGIN drops below VBAT, the AAT3603 automatically reconfig- ures its power switches to minimize current drain from the battery. Adapter Power Indicator (ADPP) This is an open drain output which will pull low when VCHGIN > 4.5V. When this happens the charge current will be reset to the default ISET values or I2C programmed values. Charge Status Output (STAT) The AAT3603 provides battery charging status via a sta- tus pin. This pin is a buffered output with a supply level up to the LDO1 output (PowerDigital). The status pin can indicate the following conditions: Event Description STAT No battery charging activity Low (to GND) Battery charging High (to VOUT1) Charging completed Low (to GND) Table 2: Charge Status Output (STAT). CHGIN Bypass Capacitor Selection CHGIN is the power input for the AAT3603 battery char- ger. The battery charger is automatically enabled when- ever a valid voltage is present on CHGIN. In most appli- cations, CHGIN is connected to either a wall adapter or USB port. Under normal operation, the input of the char- ger will often be “hot-plugged” directly to a powered USB or wall adapter cable, and supply voltage ringing and overshoot may appear at the CHGIN pin. A high quality capacitor connected from CHGIN to G, placed as close as possible to the IC, is sufficient to absorb the energy. Wall-adapter powered applications provide flexibility in input capacitor selection, but the USB specification pres- ents limitations to input capacitance selection. In order to meet both the USB 2.0 and USB OTG (On The Go) specifications while avoiding USB supply under-voltage conditions resulting from the current limit slew rate (100mA/μs) limitations of the USB bus, the CHGIN bypass capacitance value must be between 1μF and 4.7μF. Ceramic capacitors are often preferred for bypass- ing due to their small size and good surge current rat- ings, but care must be taken in applications that can encounter hot plug conditions as their very low ESR, in combination with the inductance of the cable, can create a high-Q filter that induces excessive ringing at the CHGIN pin. This ringing can couple to the output and be mistaken as loop instability, or the ringing may be large enough to damage the input itself. Although the CHGIN pin is designed for maximum robustness and an absolute Constant Current Mode Charge Current vs. ISET Resistor (VIN = 5V; VBAT = 3.6V) ISET Resistor (k Ω Ω) 0 200 400 600 800 1000 1200 1400 0.1 1 10 100 ISET Voltage vs. Battery Voltage (CHGIN = 5.0V, RISET = 1.24k Ω Ω) Battery Voltage (V) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 2.5 2.9 3.3 3.7 4.1 4.5 Figure 5: Constant Current Mode Charge ICH_CC Setting vs. ISET Resistor and ISET Voltage vs. Battery Voltage. |
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