M74HC109

2/12

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

TRUTH TABLE

X : Don’t Care

LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

PIN No

SYMBOL

NAME AND FUNCTION

1,15

1CLR, 2CLR

Asynchronous Reset

Direct Input

2, 14, 3, 13

1J, 2J, 1K,

2K

Synchronous Inputs;

Flip-Flops 1 and 2

4, 12

1CK, 2CK

Clock Input

5, 11

1PR, 2PR

Asynchronous Set Direct

Input (Active Low)

6, 10

1Q, 2Q

True Flip-Flop Outputs

7, 9

1Q, 2Q

Complement Flip-Flop

Outputs

8

GND

Ground (0V)

16

Vcc

Positive Supply Voltage

INPUTS

OUTPUTS

FUNCTION

CLR

PR

JK

CK

Q

Q

L

H

X

X

X

L

H

CLEAR

H

L

X

X

X

H

L

PRESET

LL

X

X

X

H

H

----

H

H

L

H

Qn

Qn

NO CHANGE

H

H

L

L

L

H

----

HHHH

H

L

----

HHH

L

Qn

Qn

TOGGLE

H

H

X

X

Qn

Qn

NO CHANGE