M74HC533

2/11

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

TRUTH TABLE

X: Don’t Care

Z: High Impedance

(*): Q Outputs are latched at the time when the LE input is taken low logic level.

LOGIC DIAGRAM

PIN No

SYMBOL

NAME AND FUNCTION

1OE

3 State Output Enable

Input (Active LOW)

2, 5, 6, 9, 12,

15, 16, 19

Q0 to Q7

3 State Outputs

3, 4, 7, 8, 13,

14, 17, 18

D0 to D7

Data Inputs

11

LE

Latch Enable Input

10

GND

Ground (0V)

20

Positive Supply Voltage

INPUTS

OUTPUTS

OE

LE

D

Q

H

XXZ

L

L

X

NO CHANGE (*)

LHL

H

LH

H

L