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PM6685 Datasheet(PDF) 25 Page - STMicroelectronics |
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PM6685 Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 52 page ![]() PM6685 Device description 25/52 For higher loads the inductor current doesn’t cross the zero and the device works in the same way as in PWM mode and the frequency is fixed to the nominal value. Figure 31. PWM and pulse skip mode inductor current Figure 31 shows inductor current waveforms in PWM and SKIP mode. In order to keep average inductor current equal to load current, in SKIP mode some switching cycles are skipped. When the output ripple reaches the regulated voltage Vreg, a new cycle begins. The off cycle duration and the switching frequency depend on the load condition. As a result of the control technique, losses are reduced at light loads, improving the system efficiency. 7.5 No-audible skip mode If SKIP pin is tied to VREF, a no-audible skip mode with a minimum switching frequency of 33kHz is enabled. At light load condition, If there is not a new switching cycle within a 30us(typ.) period, a no-audible skip mode cycle begins. Figure 32. Frequency clamp skip mode The low side switch is turned on until the output voltage crosses about Vreg+1%. Then the high side MOSFET is turned on for a fixed on time period. Afterwards the low side switch is enabled until the inductor current reaches the zero-crossing threshold. This keeps the switching frequency higher than 33kHz. As a consequence of the control, the regulated voltage can be slightly higher than Vreg (up to 1%). Time Ton1 Toff 0 Inductor current PWM mode Pulse skip mode Ton2 Low side off Toff Low side on Load current Ton1=Ton2 Time 0 Inductor current No-audible skip mode Low side ∼30us |
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