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STA335BWS Datasheet(PDF) 52 Page - STMicroelectronics |
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STA335BWS Datasheet(HTML) 52 Page - STMicroelectronics |
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52 / 68 page  Register description STA335BWS 52/68 Dynamic range compression mode 6.12 User-defined coefficient control registers (addr 0x16 to 0x26) 6.12.1 Coefficient address register 6.12.2 Coefficient b1 data register bits 23:16 Table 29. Limiter attack threshold as a function of LxAT bits (DRC-Mode) Table 30. Limiter release threshold as a as a function of LxRT bits (DRC-Mode) LxAT[3:0] DRC (dB relative to Volume) LxRT[3:0] DRC (db relative to Volume + LxAT) 0000 -31 0000 - ∞ 0001 -29 0001 -38 dB 0010 -27 0010 -36 dB 0011 -25 0011 -33 dB 0100 -23 0100 -31 dB 0101 -21 0101 -30 dB 0110 -19 0110 -28 dB 0111 -17 0111 -26 dB 1000 -16 1000 -24 dB 1001 -15 1001 -22 dB 1010 -14 1010 -20 dB 1011 -13 1011 -18 dB 1100 -12 1100 -15 dB 1101 -10 1101 -12 dB 1110 -7 1110 -9 dB 1111 -4 1111 -6 dB D7 D6 D5 D4 D3 D2 D1 D0 Reserved CFA5 CFA4 CFA3 CFA2 CFA1 CFA0 00 00 00 D7 D6 D5 D4 D3 D2 D1 D0 C1B23 C1B22 C1B21 C1B20 C1B19 C1B18 C1B17 C1B16 00 00 00 00 |
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