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STP40NS15 Datasheet(PDF) 1 Page - STMicroelectronics

Part # STP40NS15
Description  N-CHANNEL 150V - 0.042ohm - 40A TO-220 MESH OVERLAY™ MOSFET
PDF  6 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STP40NS15 Datasheet(HTML) 1 Page - STMicroelectronics

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PRELIMINARY DATA
October 2000
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
STP40NS15
N-CHANNEL 150V - 0.042
Ω - 40A TO-220
MESH OVERLAY™ MOSFET
INTERNAL SCHEMATIC DIAGRAM
s
TYPICAL RDS(on) = 0.042Ω
s
EXTREMELY HIGH dv/dt CAPABILITY
s
VERY LOW INTRINSIC CAPACITANCES
s
GATE CHARGE MINIMIZED
DESCRIPTION
This powermos MOSFET is designed using the
company’s consolidated strip layout-based MESH
OVERLAY
™ process. This technology matches
and improves the performances compared with
standard parts from various sources.
APPLICATIONS
s
HIGH CURRENT SWITCHING
s
UNINTERRUPTIBLE POWER SUPPLY (UPS)
s
PRIMARYSWITCH IN ISOLATED DC-DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS
(•)Pulse width limited by safe operating area
TYPE
VDSS
RDS(on)
ID
STP40NS15
150 V
<0.052
Ω
40A
Symbol
Parameter
Value
Unit
VDS
Drain-source Voltage (VGS = 0)
150
V
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
150
V
VGS
Gate- source Voltage
±20
V
ID
Drain Current (continuos) at TC = 25°C
40
A
ID
Drain Current (continuos) at TC = 100°C
25
A
IDM (q)
Drain Current (pulsed)
160
A
PTOT
Total Dissipation at TC = 25°C
140
W
Derating Factor
0.933
W/°C
dv/dt
Peak Diode Recovery voltage slope
9
V/ns
Tstg
Storage Temperature
–65 to 175
°C
Tj
Max. Operating Junction Temperature
175
°C
1
2
3
TO-220


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