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STP4NB100FP Datasheet(PDF) 1 Page - STMicroelectronics |
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STP4NB100FP Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 9 page  STP4NB100 STP4NB100FP N - CHANNEL 1000V - 4 Ω - 3.8A - TO-220/TO-220FP PowerMESH ™ MOSFET s TYPICAL RDS(on) =4 Ω s EXTREMELY HIGH dv/dt CAPABILITY s 100% AVALANCHE TESTED s VERY LOW INTRINSIC CAPACITANCES s GATE CHARGE MINIMIZED DESCRIPTION Using the latest high voltage MESH OVERLAY ™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ® INTERNAL SCHEMATIC DIAGRAM October 1999 TO-220 TO-220FP 1 2 3 1 2 3 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Un it STP4NB100 ST P4NB100F P VDS Drain-source Voltage (VGS =0) 1000 V VDGR Drain- gat e Voltage (RGS =20 k Ω) 1000 V VGS Gate-source Voltage ± 30 V ID Drain Current (continuous) at Tc =25 oC 3.8 3.8(*) A ID Drain Current (continuous) at Tc = 100 oC 2.4 2.4(*) A IDM ( •) Drain Current (pulsed) 15.2 15.2 A Ptot T otal Dissipation at Tc =25 oC 125 40 W Derating F actor 1 0.32 W / o C dv/dt (1) Peak Diode Recovery voltage slope 4 4 V/ns VISO Insulation Withstand Voltage (DC) 2000 V Tstg Storage Temperat ure -65 to 150 o C Tj Max. Operating Junction T emperature 150 o C ( •) Pulse width limited by safe operating area ( 1)ISD ≤ 3.8A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS,Tj ≤ TJMAX (*) Limited only by maximum temperature allowed TYPE VDSS RDS(on) ID ST P4NB100 ST P4NB100FP 1000 V 1000 V <4.4 Ω <4.4 Ω 3.8 A 3.8 A 1/9 |
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