Preliminary Data

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to

change without notice.

May 2007

Rev 1

1/28

28

STV7733

320 output dot-matrix display driver

Features

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High-voltage, row/column driver IC

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320, tri-level (high-voltage, medium voltage

and ground) power outputs:

– capable of operating at 90 V, absolute max.

– capable of sinking or sourcing 2 mA

– Hi-Z

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Logic supply range: 2.5V to 3.3V

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Slim shape die for COG, COF and TCP

solutions

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Interface:

– four dual (2-bit) input serial buses:

operating at shift clock frequency of

10 MHz, max.

– three control inputs: shift clock direction

(DIR), chip select (/CS) and data latch

(/DL)

– two “all output” stage control inputs: AOC1

and AOC2

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Power supplies:

– high-voltage for power outputs: 90 V, max.

– logic supply suitable for battery powered

applications: 2.5V, min.

Description

The STV7733 device is a low-power,

controller/driver IC for dot-matrix displays. Data is

encoded on two bits to select one of four possible

output states: high level, medium level, ground or

high impedance (Hi-Z).

Inputs AOC1 and AOC2 control the all output

stages simultaneously to select one of five

possible configurations: high level, medium level,

ground, Hi-Z or data through.

Except for the data through mode, the

configuration selected by AOC1 and AOC2 is

applied to all outputs at the same time.

The STV7733 communicates with the host

controller through an 8-bit parallel interface. The

input data bus is organized as four, 2 x 80-bit shift

registers operating in parallel at a maximum clock

frequency of 10MHz.

Logic inputs are LVCMOS compatible.

The STV7733 is available in bumped die form.

Bumped die can be assembled in either a TCP or

COG module.

Figure 1.

Block diagram

AOC1

DB

DB

DIR

/CS

SCLK

VDD

/DL

VSSL

DB

DB

AOC2

HVDD

STBTEST

OUT1

OUT2

OUT320

MVDD

2 x 320-bit latch

Q1 Q2 Q3 Q4

Q320

Output control

Tri-level output buffer stage

DB

DB

2 x 80-bit shift register

VSSP

HVDD

MVDD

VSSP

POE

VSSS

2 x 80-bit shift register

2 x 80-bit shift register

2 x 80-bit shift register

OE

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