STW41413SLASHT datasheet(23/31 Pages) STMICROELECTRONICS

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Application information

STw4141

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4.6.2

Input capacitor (CIN selection)

Input capacitor of 10

µF ceramic low ESR capacitor should be used to reduce switching

losses. It should be placed as close as possible to supply pins VDD and PVDD. The

connection traces should be wide and short to minimize impedance.

4.6.3

Output capacitors (COUT selection)

The selection of COUT is driven by the required ESR to minimize voltage ripple and load

step transients. There are two possibilities for output capacitors: either a 22

µF is connected

to ground or two 10

µF ceramic are used to reduce ESR and switching losses. The capacitor

should be placed as close as possible to VOUTx pins. The connection traces should be wide

and short to minimize impedance.

4.6.4

Capacitors selection

Table 9.

Bill of Material: capacitor selection

Component

Supplier

Part number

Value

Case size

MURATA

GRM188R60J106ME47D

µF, 6.3V

0603

GRM21BR60J106ME15L

µF, 6.3V

0805

TAIYO YUDEN

JMK212BJ106MG-T

µF, 6.3V

0805

TDK

C1608X5R0J106MT

µF, 6.3V

0603

C2012X5R0J106MT

µF, 6.3V

0805

COUT1, COUT2

MURATA

GRM188R60J106ME47D

2 x 10

µF, 6.3V

2 x 0603

GRM21BR60J106ME15L

2 x 10

µF, 6.3V

2 x 0805

GRM21BR60J226ME15L

µF, 6.3V

0805

TAYIO YUDEN

JMK212BJ106MG-T

2 x 10

µF, 6.3V

2 x 0805

JMK212BJ226MG-T

µF, 6.3V

0805

TDK

C1608X5R0J106MT

2 x 10

µF, 6.3V

2 x 0603

C2012X5R0J106MT

2 x 10

µF, 6.3V

2 x 0805

C2012X5R0J226MT

µF, 6.3V

0805

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