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DSP56311 Datasheet(PDF) 75 Page - Freescale Semiconductor, Inc

Part # DSP56311
Description  24-Bit Digital Signal Processor
PDF  96 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56311 Datasheet(HTML) 75 Page - Freescale Semiconductor, Inc

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PLL Performance Issues
DSP56311 Technical Data, Rev. 8
Freescale Semiconductor
4-5
4.4.2
Phase Jitter Performance
The phase jitter of the PLL is defined as the variations in the skew between the falling edges of EXTAL and CLKOUT
for a given device in specific temperature, voltage, input frequency, MF, and capacitive load on CLKOUT. These
variations are a result of the PLL locking mechanism. For input frequencies greater than 15 MHz and MF
≤4, this
jitter is less than
±0.6 ns; otherwise, this jitter is not guaranteed. However, for MF < 10 and input frequencies
greater than 10 MHz, this jitter is less than
±2 ns.



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