M38039G8HKP datasheet(37/92 Pages) RENESAS

37 / 92 page

Rev.1.10

Nov 14, 2005

Page 37 of 91

REJ03B0166-0110

3803 Group (Spec.H QzROM version)

PRELIMINARY

Notice: This is not a final specification.

Some parametric limits are subject to change.

Fig 24. Block diagram of timer Z

P47/CNTR2

“001”

XIN

Output level latch

Programmable one-shot

generating mode

CNTR2 active edge

switch bit

Programmable one-shot

generating mode

Data bus

To timer Z interrupt

request bit

To INT1 interrupt

request bit

Programmable waveform

generating mode

Pulse output mode

CNTR2 active edge switch bit

Pulse output mode

Timer Z operating

mode bits

Port P47

direction register

Port P47

latch

Pulse period measurement mode

Pulse width measurement mode

Timer Z count stop bit

Count source

selection bit

(1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256, 1/512, 1/1024)

Divider

CNTR2 active edge

switch bit

“1”

Timer/Event

counter mode

switch bit

“0”

“1”

“0”

P42/INT1

Programmable one-shot

generating circuit

“100”

“101”

To CNTR2 interrupt

request bit

“0”

f(XCIN)

Edge detection circuit

“1”

“0”

Timer Z low-order latch

Timer Z low-order

Timer Z high-order latch

Timer Z high-order

XCIN

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