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HD74HC688P Datasheet(PDF) 1 Page - Renesas Technology Corp |
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HD74HC688P Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 8 page ![]() Rev.2.00, Mar 30, 2006 page 1 of 7 HD74HC688 8-bit Magnitude Comparator REJ03D0643–0200 (Previous ADE-205-529) Rev.2.00 Mar 30, 2006 Description The HD74HC688 compares bit for bit two 8-bit words and indicates whether or not they are equal. The P=Q output indicates equality when it is low. A single active low enable is provided to facilitate cascading of several packages and enable comparison of words greater than 8-bits. This device is useful in memory block decoding applications, where memory block enable signals must be generated from computer address information. Features • High Speed Operation: t pd (P or Q to Output) = 17 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: V CC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: I CC (static) = 4 µA max (Ta = 25°C) • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74HC688P DILP-20 pin (JEDEC) PRDP0020AC-B (DP-20NEV) P — HD74HC688FPEL SOP-20 pin (JEITA) PRSP0020DD-B (FP-20DAV) FP EL (2,000 pcs/reel) HD74HC688RPEL SOP-20 pin (JEDEC) PRSP0020DC-A (FP-20DBV) RP EL (1,000 pcs/reel) Function Table Input Data P, Q Enable G Output P=Q P=Q L L P>Q L H P<Q L H X H H H : high level L : low level X : irrelevant |
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