Rev.3.00, May 10, 2006, page 1 of 5

HD74LS75

Quadruple Bistable Latches

REJ03D0416-0300

Rev.3.00

May 10, 2006

The HD74LS75 is ideally suited for use as temporary storage for binary information between processing units and

input / output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable

(G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low,

the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the

enable is permitted to go high. This device features complementary Q and

Q outputs from a 4-bit latch.

Features

• Ordering Information

Part Name

Package Type

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LS75P

DILP-16 pin

PRDP0016AE-B

(DP-16FV)

P

—

HD74LS75FPEL

SOP-16 pin (JEITA)

PRSP0016DH-B

(FP-16DAV)

FP

EL (2,000 pcs/reel)

Note:

Please consult the sales office for the above package availability.

Pin Arrangement

(Top view)

1Q

4

Q

1

Q

1D

2D

Enable 3-4

3D

4D

2Q

2

Q

GND

Enable 1-2

3

Q

3Q

4Q

15

16

1

2

3

4

5

6

7

14

8

9

10

11

12

13

Q

Q

Q

Q

D

G

D

G

Q

Q

D

G

Q

Q

D

G