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M66291GP Datasheet(PDF) 21 Page - Renesas Technology Corp |
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M66291GP Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 126 page  M66291GP/HP Rev 1.01 2004.11.01 page 21 of 122 Interrupt factor 1 ("H" active) Negate period (Approx.667ns) Factor 1 occur <Edge sense> Factor 1 clear Factor 2 occur Factor 2 clear Interrupt factor 2 ("H" active) Interrupt pin ("L" active) Interrupt factor 1 ("H" active) Factor 1 occur <Leve sense> Factor 1 clear Factor 2 occur Factor 2 clear Interrupt factor 2 ("H" active) Interrupt pin ("L" active) Figure 2.5 Interrupt Signal Output Timing (11) INTA (Interrupt Polarity) Bit (b0) This bit sets the interrupt signal output polarity. When this bit is set to “0”, the occurrence of interrupt is notified when; In case of edge sense (INTL bit = “0”) : Change from “H” to “L” In case of level sense (INTL bit = “1”) : “L” level When this bit is set to “1”, the occurrence of interrupt is notified when; In case of edge sense (INTL bit = “0”) : Change from “L” to “H” In case of level sense (INTL bit = “1”) : “H” level |
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