HD151TS201AT datasheet(16/29 Pages) RENESAS

Part #	HD151TS201AT

Description	Mother Board Clock Generator for Intel P4 Chipset Banias and Dothan processor / ODEM and MONTARA-GM chip set

PDF	29 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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16 / 29 page

HD151TS201AT

Rev.1.00, Oct.21.2003, page 16 of 28

2C Controlled Register Bit Map (cont.)

Byte20 PCI Skew Control Register 3

Bit

Description

Contents

Default

(Reserved)

PCI6 skew Early or Late

PCI5 skew Early or Late

PCI4 skew Early or Late

PCI3 skew Early or Late

PCI2 skew Early or Late

PCI1 skew Early or Late

PCI0 skew Early or Late

“0” = Early

“1” = Late

Byte21 Slew Rate Control Register

Bit

Description

Contents

Default

PCI clock slew rate controlbit1

PCI clock slew rate controlbit0

00 : Normal

10 : ++

01 : +

11 : –

PCIF clock slew rate controlbit1

PCIF clock slew rate controlbit0

00 : Normal

10 : ++

01 : +

11 : –

66OUT clock slew rate controlbit1

66OUT clock slew rate controlbit0

00 : Normal

10 : ++

01 : +

11 : –

3V66 clock slew rate controlbit1

3V66 clock slew rate controlbit0

00 : Normal

10 : ++

01 : +

11 : –

Byte22 Slew Rate Control Register

Bit

Description

Contents

Default

Reserved

REF clock slew rate controlbit1

REF clock slew rate controlbit0

00 : Normal

10 : ++

01 : +

11 : –

VCH clock slew rate controlbit1

VCH clock slew rate controlbit0

00 : Normal

10 : ++

01 : +

11 : –

HD151TS201AT Datasheet(PDF) 16 Page - Renesas Technology Corp

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