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HD74AC182 Datasheet(PDF) 2 Page - Renesas Technology Corp |
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HD74AC182 Datasheet(HTML) 2 Page - Renesas Technology Corp |
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2 / 7 page ![]() HD74AC182 Rev.2.00, Jul.16.2004, page 2 of 6 Logic Symbol Cn G P P0 Cn+x Cn+y Cn+z G0 P1 G1 P2 G2 P3 G3 Pin Names Cn Carry Input G 0, G2 Carry Generate Inputs (Active Low) G 1 Carry Generate Input (Active Low) G 3 Carry Generate Input (Active Low) P 0, P1 Carry Propagate Inputs (Active Low) P 2 Carry Propagate Input (Active Low) P 3 Carry Propagate Input (Active Low) C n + x to Cn + z Carry Outputs G Carry Generate Output (Active Low) P Carry Propagate Output (Active Low) Logic Diagram Cn Cn+x Cn+y Cn+z G0 P0 G1 GP P1 G2 P2 G3 P3 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Functional Description The HD74AC182/HD74ACT182 carry lookahead generator accepts up to four pairs of Active Low Carry Propagate ( P 0 to P 3) and Carry Generate (G0 to G3) signals and an Active High Carry input (Cn) and provides anticipated Active High carries (C n + x, Cn + y , Cn + z) across four groups of binary adders. The HD74AC182/HD74ACT182 also has Active Low Carry Propagate ( P) and Carry Generate (G) outputs which may be used for further level of lookahead. The logic equations provided at the outputs are: |
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