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M64894GP Datasheet(PDF) 8 Page - Renesas Technology Corp

Part # M64894GP
Description  Serial Input PLL Frequency Synthesizer for TV/VCR
PDF  13 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M64894GP Datasheet(HTML) 8 Page - Renesas Technology Corp

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M64894FP/GP
Rev.2.00 Jun 14, 2006 page 8 of 12
Data Cording Example
Write Mode Format Example
Byte
MSB
LSB
Condition in Data Setting
Address Byte
1
1
0
0
0
1
1
0
1
ADS input VCC1
Divider byte 1
0
1
0
0
0
0
0
0
1
Divider byte 2
1
0
1
0
0
0
0
0
1
Dividing ratio N
= 16544
Control byte 1
1
1
0
0
0
0
1
0
1
C.P.current 270
µA
fREF division ratio 1/1024
Band SW byte
0
0
0
0
1
0
0
0
1
BS4 output ON
Note:
fVCO
= N 8 fREF = 16544 8 (4MHz/1024) = 517MHz
Read Mode Format Example
Byte
MSB
LSB
Condition in Data Setting
Address byte
1
1
0
0
0
1
1
1
1
Status byte 1 input
1
1
1
1
1
1
1
1
1
Status byte 1 output
0
1
1
1
1
0
1
1
1
FL “1” output at locked ADC
input at open
Test Mode Data Set Up Method
Test Mode Bit Set Up
X
: Random, 0 or 1. normal “0”
MA1, MA0
: Programmable address bit
Address Input Voltage
MA1
MA0
0 to 0.1
± VCC1
0
0
Always valid
0
1
0.4
± VCC1 to 0.6*VCC1
1
0
0.9
± VCC1 to VCC1
1
1
Note:
N14 to N0: How to set dividing ratio of the programmable the divider
Dividing ratio N
= N14 (2
14 = 16384)
+ +N0 (20 = 1)
Therefore, the range of division N is 1,024 to 32,768
Example) fVCO
= f
REF
• 8 • N
= 3.90625
• 8 • N
= 31.25
• N (kHz)
CP: Setting Up The Charge Pump Current of The Phase Comparator
CP
Charge pump current
Mode
0
70
µA
Test
1
270
µA
Normal



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