Rev.2.00 Mar 30, 2006 page 1 of 10

HD74HC563, HD74HC573

Octal Transparent Latches (with 3-state outputs)

REJ03D0629-0200

(Previous ADE-205-509)

Rev.2.00

Mar 30, 2006

Description

When the latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D inputs and

the Q outputs of HD74HC573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be

retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control

input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of

the storage elements.

Features

• High Speed Operation: t

• High Output Current: Fanout of 15 LSTTL Loads

• Wide Operating Voltage: V

• Low Input Current: 1 µA max

• Low Quiescent Supply Current: I

• Ordering Information

Part Name

Package Type

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74HC563P

HD74HC573P

DILP-20 pin

PRDP0020AC-B

(DP-20NEV)

P

—

HD74HC563FPEL

HD74HC573FPEL

SOP-20 pin (JEITA)

PRSP0020DD-B

(FP-20DAV)

FP

EL (2,000 pcs/reel)

HD74HC563RPEL

HD74HC573RPEL

SOP-20 pin (JEDEC)

PRSP0020DC-A

(FP-20DBV)

RP

EL (1,000 pcs/reel)

HD74HC573TELL

TSSOP-20 pin

PTSP0020JB-A

(TTP-20DAV)

T

ELL (2,000 pcs/reel)

Note:

Please consult the sales office for the above package availability.

Function Table

Inputs

Outputs

Output Control

Latch Enable

Data

HD74HC563

HD74HC573

L

H

H

L

H

L

H

L

H

L

L

L

X

H

X

X

Z

Z

level of Q before the indicated Steady-sate input conditions were established.