HA17451 datasheet(3/38 Pages) RENESAS

3 / 38 page

HA16114P/PJ/FP/FPJ, HA16120FP/FPJ

Rev.2.0, Sep.18.2003, page 3 of 37

Pin Arrangement

(Top view)

116

Note: 1. Pin 1 (GND) and Pin 8 (P.GND) must be connected each other with external wire.

215

314

413

512

611

710

Vref

ADJ

ON/

OFF

CL(

−)

VIN

OUT

GND*1

SYNC

IN(

−)

E/O

IN(+)

P.GND*1

Pin Description

Pin No.

Symbol

Function

GND

Signal ground

SYNC

External sync signal input (synchronized with falling edge)

Oscillator timing resistor connection (bias current control)

Oscillator timing capacitor connection (sawtooth voltage output)

IN(–)

Inverting input to error amplifier

E/O

Error amplifier output

IN(+)

Non-inverting input to error amplifier

P.GND

Power ground

OUT

Output (pulse output to gate of power MOS FET)

Power supply input

CL(–)

Inverting input to current limiter

Timer setting for intermittent shutdown when overcurrent is detected

(sinks timer transistor current)

ON/

OFF

IC on/off control (off below approximately 0.7 V)

Dead-band duty cycle control input

ADJ

Reference voltage (Vref) adjustment input

Vref

2.5 V reference voltage output

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