TIMINGS

Symbol

Parameter

Min.

Typ.

Max.

Unit

OSCILATOR INPUT : XTI (see Figure 2)

Clock High Level

20

ns

Clock Low Level

20

ns

Clock Frequency

6

15

MHz

Pixel Frequency

30

80

MHz

RESET

RESET Low Level Pulse

4

µs

Rise Time (see Note 1)

5

ns

Fall Time (see Note 1)

5

ns

Skew between R, G, B, FBLK

5

ns

I

SCL Clock Frequency (Horizontal frequency = 32kHz)

288

kHz

Time the bus must be free between 2 access

500

ns

Hold Time for Start Condition

500

ns

Set up Time for Stop Condition

500

ns

Clock Low Level

400

ns

Clock High Level

400

ns

Hold Time Data

0

ns

Set up Time Data

500

ns

SDA Fall Time

20

ns

SCL and SDA Rise Time

Depend on the pull-up resistor

and on the load capacitance

Note 1 : These parameters are not tested on each unit. They are measured during our internal qualification procedure which includes

characterization on batches comming from corners of our processes and also temperature characterization.

XTI

t

WH

t

WL

Figure 2

SDA

SCL

Stop

Start

Data

Stop

t

BUF

t

SUP

t

HDAT

t

SUDAT

t

HDS

t

HIGH

t

LOW

Figure 3

STV9427 - STV9428 - STV9429

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