HA16117F Series

Rev.3.00 Jun 15, 2005 page 3 of 30

Block Diagram

1

6

5

8

2

3

7

−

+

4

−

+

5 V

0.1

µ

GND

Tadj

510 k

750 k

P-RUN

0.01

µ

ACC

PULSE from I/O port

W.D in

SW2

≈1.25 V

2.52 (117FA)

2.36 (117FB)

2.20 (117FC)

SW1

COMP.

COMP.

to Micro-

computer

RES

W.D in frequency (Hz)

duty 50%

W.D out

W.D out

duty (%)

duty n%

1/2 frequency

divider

GND

1

Operating: "Low"

Standby: "High"

n

Normal range

Power-on and auto-reset circuit

(SW1 and SW2 are active high)

Watchdog filter (f-duty converter)

Watchdog timer

Low voltage detector

ACC Voltage

Function

Low

Low voltage detection and WDT

Low voltage detection

Mode

Operating

Note: The power-on reset circuit operates in both operating and standby modes.

Standby

High

The HA16117F consists of a low voltage detector, power-on and auto-reset circuit, and watchdog timer.

Low Voltage Detector

Uses a reference voltage source (

≈ 1.25 V) and high-precision comparator to detect drops in the supply voltage.

Power-On and Auto-Reset Circuit

Generates the

RES waveform, using a multivibrator consisting of a current source I

Watchdog Timer

Reshapes the P-RUN signal (programming-running pulse) from the MPU to obtain a 50% duty cycle, then converts

frequency to duty cycle in the watchdog filter (WD filter).

The watchdog filter is a bandpass filter. The duty cycle of the filter output is highest in the normal frequency range of P-

RUN.

preventing the multivibrator from firing, and the

RES output remains high.