HA16174P/FP

Rev.1.00 Jan 06, 2006 page 13 of 36

Description of Pin Functions

OUT Pin:

The power MOS FET gate-drive signal is output from this pin, and takes the form of a rectangular waveform with an

amplitude of VCC-GND.

GND Pin:

The ground terminal.

DELAY Pin:

This pin has three functions; (1) delay-time setting for output of the Power Good signal, (2) setting the PFC function

hold time for cases of momentary outage, and (3) IC shutdown.

Normal operation is as a 100

µA constant-current sink.

(1) Power Good signal output delay

When the PFC output voltage is within the range from 96% (typ.) to 105.5% (typ.), this pin functions as a 10

µA

source current. When the capacitor is charged until the voltage reaches 2.5 V (typ.), the Power Good signal is

output and the delay-pin function becomes a 100

µA sink current. The delay time for Power Good signal output is

set by the values of the external capacitor.

(2) Setting the PFC function hold time for momentary outage

When the PFC-ON pin is driven below 1.6 V (typ.) due to a momentary outage, the delay pin functions as a 10

µA

source current. PFC operation continues until the capacitor is charged to 1.25 V (typ.). After the voltage on the

delay pin reaches 1.25 V (typ.) the pin functions as a 100

µA sink current, and PFC operation terminates. The PFC

function hold time can be set by the value of the external capacitor.

(3) Shutdown

When this pin is pulled up to 4 V (typ.) or higher, the IC enters the shutdown state. Accordingly, the VREF signal

becomes low and the operating current becomes several hundred

µA. The IC does not resume operation until Vcc

falls to 4 V (max.) or below.

Note:

(1) and (2) cannot be set independently.

PGADJ Pin:

This pin sets the stop level of power good signal. If the FB pin voltage falls below this pin voltage, the Power Good

signal stops immediately. Do not set this pin voltage to 2.3 V or higher. When this pin is open-circuit, the Power Good

signal stops when the voltage on the FB pin becomes lower than 0.55 V (max.).

PFC-ON Pin:

This pin is applied smoothing voltage of rectified AC voltage. When 1.75 V (typ.) or more is applied to this pin, PFC

operation starts. When the voltage is 1.6 V (typ.) or lower, the PFC operation stops after the PFC operation hold time

(refer to the description of DELAY pin operation). When the voltage is forcibly lower than 0.95 V (typ.), PFC

operation stops even if the PFC operation hold time has not elapsed.

VREF Pin:

Temperature-compensated voltage with an accuracy of 5 V

± 3% is output from this pin. The pin should supply no

more than 5 mA (max.) source current. This pin has no sink capabilities.

CAO Pin:

This pin is the current-error amplifier output, and is connected to the phase-compensation circuit of the current-error

amp. The result of comparison of the voltage on this pin and the CT pin produces the pulse output from the OUT pin.

CS Pin:

Current detection pin. The current is controlled to be proportional to the AC voltage and the power factor is corrected.

When the voltage on this pin drops to –0.3 V (typ.) or below, over current detection circuit operates, and OUT pin is

stopped.