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R5S72011 Datasheet(PDF) 67 Page - Renesas Technology Corp |
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R5S72011 Datasheet(HTML) 67 Page - Renesas Technology Corp |
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67 / 1196 page ![]() Section 2 CPU Rev. 2.00 Sep. 07, 2007 Page 39 of 1164 REJ09B0321-0200 Classification Types Operation Code Function No. of Instructions 26 ADD Binary addition 40 ADDC Binary addition with carry ADDV Binary addition with overflow check CMP/cond Comparison CLIPS Signed saturation value comparison CLIPU Unsigned saturation value comparison DIVS Signed division (32 ÷ 32) DIVU Unsigned division (32 ÷ 32) DIV1 One-step division Arithmetic operations DIV0S Initialization of signed one-step division DIV0U Initialization of unsigned one-step division DMULS Signed double-precision multiplication DMULU Unsigned double-precision multiplication DT Decrement and test EXTS Sign extension EXTU Zero extension MAC Multiply-and-accumulate, double-precision multiply-and-accumulate operation MUL Double-precision multiply operation MULR Signed multiplication with result storage in Rn MULS Signed multiplication MULU Unsigned multiplication NEG Negation NEGC Negation with borrow SUB Binary subtraction SUBC Binary subtraction with borrow SUBV Binary subtraction with underflow |
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